Interrupt and exceptions

x386 Specific
 

The 386 recognizes two event classes: exceptions and interrupts. Both cause a forced context switch to new a procedure or task. Interrupts can occur at unexpected times during the execution of a program and are used to respond to signals from hardware. Exceptions are caused by the execution of instructions.

According to source Interrupts are of two types
1) Masakble 2)Non-Maskable
According to Source Exceptions are of two types
1)Processor Detected 2) Programmed Exception

Non-maskable interrupts and processor exceptions are assigned vector from 0-31.2 to 255 vectors can be used for maskable interrupt or programmed exception.Those are assigned/put in databus by external interrupt controller during interrupt acknowledgemt. 

Vector	Description
0	divide error
1	debug exception
2	NMI interrupt
3	Breakpoint
4	INTO-detected Overflow
5	BOUND range exceeded
6	Invalid opcode
7	coprocessor not available
8	double fault
9	coprocessor segment overrun
10	invalid task state segment
11	segment not present
12	stack fault
13	general protection
14	page fault
15	reserved
16	coprocessor error
17-31	reserved
32-255	maskable interrupts

The priority of simultaneous interrupts and exceptions is:
HIGHEST	Faults except debug faults
.	Trap instructions INTO, INT n, INT 3
.	Debug traps for this instruction
.	Debug traps for next instruction
.	NMI interrupt
LOWEST	INTR interrupt

How Linux Initializes the system call vectors

The startup_32() code found in /usr/src/linux/boot/head.S starts everything off by calling setup_idt(). This routine sets up an IDT (Interrupt Descriptor Table) with 256 entries. No interrupt entry points are actually loaded by this routine, as that is done only after paging has been enabled and the kernel has been moved to 0xC0000000. An IDT has 256 entries, each 4 bytes long, for a total of 1024 bytes. When start_kernel() (found in /usr/src/linux/init/main.c) is called it invokes trap_init() (found in /usr/src/linux/kernel/traps.c). trap_init() sets up the IDT via the macro set_trap_gate() (found in /usr/include/asm/system.h). trap_init() initializes the interrupt descriptor table

Note: When an NMI signal is received, the processor immediately drops whatever it was doing and attends to it.Its critical

 

PPC Specific
 

Can be catagorized according to clocking charecteristic as below
1) Asynchronus Interrupt
Independent of Instruction execution.Adrress reprted is next to be executable address.

2) Synchronus Interrupt.
Caused directly by the execution of instruction (or attempted execution)

a) Precise sync Inerrupt.
Indicate the perfect instruction address caused the interrupt.
b) Imprecise Interrupt.
May indiacte the instruction after the interrupting instruction or some instruction laters

We can also categorize according to behavior
1) Critical (In PPC465 CSRR0 and CSRR1 are used to store state normally when some non -critical intr's are being served))
2) Non Citical ( In PPC465 SRR0 and SRR1 are used )

Another kind of interrupt is Machine check interrupt in case of PowerPC.This is important interrupt. happen when some memory access for instruction fetch,for a data access, or for a TLB access.L2 access error is alsso included. For Machine check exception in PPC465 MCSRR0 registers used.

The interrupt priority of simultaneous interrupts and exceptions is:
HIGHEST	1. Synchronous (non-debug) interrupts:
		1. Data Storage
		2. Instruction Storage
		3. Alignment
		4. Program
		5. Floating-Point Unavailable
		6. System Call
		7. Auxiliary Processor Unavailable
		8. Data TLB Error
		9. Instruction TLB Error
	2. Machine Check
	3. Debug
	4. Critical Input
	5. Watchdog Timer
	6. External Input
	7. Fixed-Interval Timer
LOWEST	8. Decrementer

 

for detail refer some ppc core manual for specific registers.

References:

http://www.tldp.org/LDP/khg/HyperNews/get/syscall/syscall86.html