Hardware Breakpoint vs Software Breakpoint.
I was unaware about what kind of break point should I use for debugging in different places.Which one is better?What are the advantages or disadvantages of using the?
ok...
Hardware breakpoints need support from hardware itself ,that is the processor itself only. Where software breakpoint needs support of processor in its instruction sets only.
In software break-point the development platform inject a extra INT 3/bu which is software interrupts kind of instructions in the code itself.Whenever Instruction Pointer comes here it stops the processor here may jump to a predefined ISR location.Here the debugger development platform collect the data for debugging by programmer.We can use as many SW breakpoints as we want.
On the other hand hardware break do stop the processor but in different way.Normally there are hardware registers (little known dr register in x86) to configure these kind of breakpoints.Using HW breakpoints we can use it as "memory breakpoints" or instruction breakpoints.The breakpoints are fired whenever the processor try access the memory location,or the address of the instruction.We can set HW break point in ISRs also.But greatest disadvantage of HW BP is that number of HW BP is limited.
Places where HW BP is necessary.
1)ROM code is the code location we can not use SW BP for debugging.As SW BP requires code to be modified,we can't use SW BP here.Oh,yes , we can load the code to RAM always and debug it using SW BP.The process is rather inaccurate because rom code like bootstrap portion code always have different kinds of memory usage.So,we have to use only HW BP. There are some places where self modifying code where SW BP also can't be used.
2)Chip Select Problem is another problem .Some time RAM chip select is disabled,As we know SW BP work when code is modified,which runs from RAM .In this kind of situation SW BP fails.
3)Read fail at 0x000C- As emulators normally keep watch on location 0xC which is ISR location of INT3.whenever any read on that location is done, processor halts.Some memory checking programs if tries to read the location program halts.Though it's not SW BP in the program,the program breaks.So to use SW BP turn off the memory checks.
4)Specious interrupts- If in some point debugger gets out of syn somehow in some unauthenticated interrupt SW BP is very difficult to give perfect result.That is because whenever debugger gets out of the sync it again upload the code to the RAM as SW BP works on modified code.In ISR situation it is odd and catastrophic to consume ISR time.
5)Breakpoints in ISR- Using breakpoints in ISR is according to programming paradigm.Step step by debugging inside ISR is ridicules because we can not inject SW BP instruction in side ISR
for each line of ISR.
ok...
Hardware breakpoints need support from hardware itself ,that is the processor itself only. Where software breakpoint needs support of processor in its instruction sets only.
In software break-point the development platform inject a extra INT 3/bu which is software interrupts kind of instructions in the code itself.Whenever Instruction Pointer comes here it stops the processor here may jump to a predefined ISR location.Here the debugger development platform collect the data for debugging by programmer.We can use as many SW breakpoints as we want.
On the other hand hardware break do stop the processor but in different way.Normally there are hardware registers (little known dr register in x86) to configure these kind of breakpoints.Using HW breakpoints we can use it as "memory breakpoints" or instruction breakpoints.The breakpoints are fired whenever the processor try access the memory location,or the address of the instruction.We can set HW break point in ISRs also.But greatest disadvantage of HW BP is that number of HW BP is limited.
Places where HW BP is necessary.
1)ROM code is the code location we can not use SW BP for debugging.As SW BP requires code to be modified,we can't use SW BP here.Oh,yes , we can load the code to RAM always and debug it using SW BP.The process is rather inaccurate because rom code like bootstrap portion code always have different kinds of memory usage.So,we have to use only HW BP. There are some places where self modifying code where SW BP also can't be used.
2)Chip Select Problem is another problem .Some time RAM chip select is disabled,As we know SW BP work when code is modified,which runs from RAM .In this kind of situation SW BP fails.
3)Read fail at 0x000C- As emulators normally keep watch on location 0xC which is ISR location of INT3.whenever any read on that location is done, processor halts.Some memory checking programs if tries to read the location program halts.Though it's not SW BP in the program,the program breaks.So to use SW BP turn off the memory checks.
4)Specious interrupts- If in some point debugger gets out of syn somehow in some unauthenticated interrupt SW BP is very difficult to give perfect result.That is because whenever debugger gets out of the sync it again upload the code to the RAM as SW BP works on modified code.In ISR situation it is odd and catastrophic to consume ISR time.
5)Breakpoints in ISR- Using breakpoints in ISR is according to programming paradigm.Step step by debugging inside ISR is ridicules because we can not inject SW BP instruction in side ISR
for each line of ISR.
Comments